Strain-Engineered MOSFETs

Strain-Engineered MOSFETs
Author :
Publisher : CRC Press
Total Pages : 311
Release :
ISBN-10 : 9781466503472
ISBN-13 : 1466503475
Rating : 4/5 (475 Downloads)

Book Synopsis Strain-Engineered MOSFETs by : C.K. Maiti

Download or read book Strain-Engineered MOSFETs written by C.K. Maiti and published by CRC Press. This book was released on 2018-10-03 with total page 311 pages. Available in PDF, EPUB and Kindle. Book excerpt: Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization. Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.


Strain-Engineered MOSFETs Related Books

Strain-Engineered MOSFETs
Language: en
Pages: 311
Authors: C.K. Maiti
Categories: Technology & Engineering
Type: BOOK - Published: 2018-10-03 - Publisher: CRC Press

DOWNLOAD EBOOK

Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors
Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications
Language: en
Pages: 203
Authors: Jacopo Franco
Categories: Technology & Engineering
Type: BOOK - Published: 2013-10-19 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several g
Nanoelectronics: Physics, Materials and Devices
Language: en
Pages: 550
Authors: Angsuman Sarkar
Categories: Technology & Engineering
Type: BOOK - Published: 2023-01-03 - Publisher: Elsevier

DOWNLOAD EBOOK

Approx.528 pagesApprox.528 pages
Reliability Physics and Engineering
Language: en
Pages: 406
Authors: J. W. McPherson
Categories: Technology & Engineering
Type: BOOK - Published: 2013-06-03 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

"Reliability Physics and Engineering" provides critically important information for designing and building reliable cost-effective products. The textbook contai
Investigation on SiGe Selective Epitaxy for Source and Drain Engineering in 22 nm CMOS Technology Node and Beyond
Language: en
Pages: 127
Authors: Guilei Wang
Categories: Technology & Engineering
Type: BOOK - Published: 2019-09-20 - Publisher: Springer Nature

DOWNLOAD EBOOK

This thesis presents the SiGe source and drain (S/D) technology in the context of advanced CMOS, and addresses both device processing and epitaxy modelling. As